TSMC's advanced packaging capacity is fully booked for the next two years, thanks to Nvidia and AMD needs, according to reports that echo an earlier earnings call.

Echoing remarks by TSMC boss C C Wei in the April [PDF] earnings call for Q1, Taiwanese publication Economic Daily News credited the full order books to AI demand.

"TSMC is fully committed to placing orders for advanced processes and advanced packaging in order to cope with the huge order demand from major cloud service companies," the Chinese language newspaper wrote.

The Taiwanese chip manufacturer is reported to be actively expanding its advanced packaging capacity, with TSMC CFO Wendell Huang referring to "global manufacturing footprint expansion plans."

Nvidia uses TSMC's 4nm process and Chip-on-Wafer-on-Substrate (CoWoS) advanced packaging in its H100 chips. AMD's MI200 series AI accelerators utilize TSMC's 5 and 6nm processes. AMD uses both System-on-Integrated-Chips (SoIC) advanced packaging to integrate CPU and GPU dies as well as CoWoS for high bandwidth memory (HBM) products.

TSMC is expected to produce CoWoS at a monthly rate of between 45,000 to 50,000 units by the end of the year, and SoIC between 5,000 and 6,000 a month in the same time frame. TSMC's SoIC is predicted to hit 10,000 a month by the end of 2025.

The Register asked TSMC to confirm the report and will update if a substantial reply materializes.

On last month's earnings call, neither AMD or Nvidia were mentioned by name. Dan Nystedt, an analyst who focuses on semiconductor companies, has estimated that Nvidia accounted for 11 percent of TSMC's revenue in 2023, and Apple, its biggest customer, 25 percent. Nysted claimed that "TSMC's top 10 customers accounted for 91 percent of net revenue" in 2023, up from 82 percent in 2022." He added that AMD was also in the top 10.

Morgan Stanley analyst Charlie Chan asked the company last month: "I know ... your CoWoS capacity has been very tight, very strategic. But I'm wondering how you're going to judge the demand and allocate the capacity to all the different type of AI semi customers. Because we're hearing your major customer is demanding 2x capacity next year. "I'm wondering how you're going to allocate, so I mean, will you still reserve a certain percentage for some smaller or strategic customers no matter if it's ASIC or smaller GPU vendors? So what is the kind of benchmark you're going to allocate those capacity to customers?"

Jeff Su, TSMC director of Investor Relations responded in the call: "So Charlie... notes that the CoWoS capacity, the demand is very strong today and also into 2025. So the capacity is very tight. So his question is, how does TSMC decide on how to allocate the capacity to customers, where we have large customers, but will we reserve capacity to support smaller customers as well?

"Let me say it again, the demand is very, very strong, and we have done our best where we put all the effort to increase the capacity. It's probably more than double this year as compared with last year. However, it's still not enough to meet the customers' demand, and we leverage our OSAT partners to complement... TSMC's capacity to fulfill our customers' need."

The chip giant suffered damage to its CoWoS plant when an earthquake hit last month. The company said that its chip supply was not dented from the event, although its capex may be.

Analyst TrendForce said on Tuesday that after the earthquake, the memory industry as a whole experienced increased prices in both DRAM, including HBM, and NAND flash that were "larger than initially expected." It forecast a Q2 increase in contract price for DRAM flash of 13-18 percent and 15-20 percent for NAND flash.

Furthermore, TrendForce reported that "manufacturers are wary of potential crowding out effects on HBM capacity."

The market research firm also predicted on Monday that HBM demand will grow 200 percent this year, and double again in 2025. Prices are projected to rise as well, between five and ten percent, in 2025.

South Korean memory maker SK hynix boasts a HBM market share of 90 percent or more. Earlier this month, TSMC and SK hynix partnered to collaborate on HBM4 development and next-generation packaging technology. HBM4 is slated to be mass produced from 2026. ®

https://www.theregister.com//2024/05/07/tsmc_advance_packaging/