Future Tech

MIPS snags top SiFive brains to amp up RISC-V business

Tan KW
Publish date: Thu, 04 Jan 2024, 08:53 AM
Tan KW
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Future Tech

Chip designer MIPS has picked up two former execs from SiFive in a bid to boost its RISC-V development efforts.

MIPS, the company that created the processor architecture of the same name, is now looking to the RISC-V open instruction set architecture for new products under the eVocore name. The eVocore P8700 has been shipping since December 2022.

The company has now appointed Drew Barbier as VP of products and Brad Burgess as chief architect to help drive further development and market take-up of its products.

Both execs were formerly at SiFive, one of the more prominent companies in the RISC-V landscape, which underwent a dramatic restructuring of its business last year with 20 percent of staff laid off. This was understood to include some of the management team as well as engineers.

Burgess was SiFive's chief CPU architect, and has upwards of three decades of experience with various processor architectures including ARM, 68000, PowerPC, and x86, as well as RISC-V. He will be responsible for development of all new key product designs, MIPS told us.

Barbier served for more than six years at SiFive as senior director of product management, and also previously worked for Arm and Analog Devices. He will oversee MIPS' product roadmap.

"I am very excited to have both Drew and Brad join the team at this crucial time in MIPS' journey as we embark on a new path for the company," said CEO Sameer Wasson in a statement.

Wasson himself was only appointed as chief last September, joining MIPS after 18 years at Texas Instruments, most recently as VP for the processor business unit.

This year marks four decades since MIPS was founded, but it is now a very different company, having been through the hands of several owners, including Imagination Technologies. These days, it is a pure-play IP company, focused on developing tech such as CPU cores for customers to build into system-on-chip (SoC) products in markets including servers, automotive, and embedded applications.

RISC-V is a popular choice for many fabless chip developers as it is an open instruction set that is publicly available and which anyone is free to build a product around. The Linux Foundation and others have founded the RISE Project to drive software ecosystem support for chips compliant with the RISC-V architecture.

MIPS said it will be at the CES 2024 tech event in Las Vegas, January 9-12, where the company is likely to offer more detail on future developments. ®

 

https://www.theregister.com//2024/01/03/mips_sifive_hires/

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