Research org Imec claims it has demonstrated the viability of ASML's next generation extreme UV technology for next generation chip manufacturing, showing off how it can create patterned structures at a smaller scale than previously possible - in a single pass.

Dutch firm ASML is the world's leading source of lithography kit that etches patterns into silicon wafers - a critical step in the chipmaking process that usually requires several passes to create different layers inside a chip. The firm for years relied on deep ultraviolet (DUV) light for that job, but that tech can't build chips of the density today's designers demand for the most powerful silicon. Extreme ultraviolet (EUV) lithography, which uses shorter wavelength light, was ASML's next step. High NA (numerical aperture) EUV is the step after that. It theoretically makes it possible to print transistors 1.7 times smaller - and therefore achieve transistor densities 2.9 times higher - than is possible with current tech.

According to ASML, the big advance in High NA EUV lithography is new optics. Numerical aperture is a measure of the equipment's ability to collect and focus light, and the larger aperture means more light and thus greater resolution.

High NA UV is expected to debut in 2025, so interest in how it performs is considerable, as once it is upon us chipmakers have suggested we'll stop measuring chips in nanometers and instead adopt the even smaller angstrom.

Belgian-based Imec (Interuniversity Microelectronics Center) claims it has successfully patterned minute logic structures in a single exposure - illustrating that High NA technology can eliminate the need for several mask layers in future chip production.

The research work was carried out at the joint Imec and ASML High NA EUV lithography laboratory opened in June this year, sited at Veldhoven in the Netherlands.

Part of the lab's purpose is to give semiconductor manufacturers access to ASML's High NA EUV photolithography kit and associated tools, so they're ready to wield it once it arrives in their fabs.

Imec explained that among the processes demonstrated, it successfully patterned single exposure random logic structures with 9.5nm dense metal lines - corresponding to a 19nm pitch - achieving sub-20nm tip-to-tip dimensions after exposure using ASML's 0.55NA EUV equipment.

"The results showcase the unique potential for High NA EUV to enable single-print imaging of aggressively-scaled 2D features, improving design flexibility as well as reducing patterning cost and complexity," observed Imec's Steven Scheer, senior VP for compute system scaling.

Looking beyond logic structures, Imec claims it successfully patterned designs that integrate the storage node landing pad with the bit line periphery for DRAM, again in a single exposure. This achievement underscores the potential of High NA technology to replace the need for several mask layers in the chipmaking process.

Imec president and CEO Luc Van den hove noted that the results confirm the long-predicted resolution capability of High NA EUV lithography to target sub-20nm pitch metal layers in a single exposure.

"High NA EUV will therefore be highly instrumental to continue the dimensional scaling of logic and memory technologies - one of the key pillars to push roadmaps deep into the 'angstrom era'," he declared. An angstrom is a tenth of a nanometer.

But Alan Priestley, vice president analyst at Gartner, argued this is not much more than a progress update - one more step on the way to getting High NA EUV in volume production.

"The real thing to watch is what TSMC/Intel say as regards their deployment and use of these tools for manufacturing chips on a specific process node," he told The Register.

ASML's High NA EUV TWINSCAN EXE:5000 products are expected to cost about €350 million ($373 million) each.

Intel is understood to have received the first production High NA EUV machine at its facility in Hillsboro, Oregon, earlier this year for use with its upcoming 14A process node. Chipzilla is believed to be in receipt of a second unit.

TSMC is also rumored to possess one of the machines. However, the Taiwanese semiconductor giant said earlier this year that it does not need High NA EUV photolithography to produce 1.6nm chips with its next-gen A16 process - in which the A stands for "angstrom." ®

https://www.theregister.com//2024/08/08/imec_asml_na_uev_results/