Posted by Shahexedy > 2021-03-18 12:08 | Report Abuse

Soonheng u ada dimana.mahu belanja mkn

Posted by Apple888 > 2021-03-18 12:32 | Report Abuse

Can goreng or not?

Posted by abcdead > 2021-03-18 12:32 | Report Abuse

ptg ni goreng smpi rentung

Posted by razifffff82 > 2021-03-18 13:35 | Report Abuse

Soonheng will never happy if you make money..neither if you dont too...but today i would like to thank him...

Posted by abcdead > 2021-03-18 16:38 | Report Abuse

1/2 way hahaha

Posted by Forcepre7238 > 2021-03-18 17:30 | Report Abuse

3/4 way only

Posted by iPlay > 2021-03-18 19:06 | Report Abuse

@soonheng programmer, one time is good, two times is too many, three times is nuisance ! be a smart programmer, don't be a rosakbot ! hehehe

Posted by waiway > 2021-03-19 08:51 | Report Abuse

Latest product from Keyasic - ASIC chips to mine the Bitcoin, Bitcoin Cash, and other associated cryptocurrencies. Should be limit up soon!!

Posted by fengpinglangjin > 2021-03-19 11:46 | Report Abuse

key had been increasing slowly 5-10% everywk...fund is slowly going in this unknown tech stock in bursa.

Key is one of the few tech stock that buck the tech down trend recently. Due to its huge potential n relatively undervalued.

Posted by fengpinglangjin > 2021-03-19 11:59 | Report Abuse

cup and handle formation on wkly chart...break out crazy up...

Posted by fengpinglangjin > 2021-03-19 12:20 | Report Abuse

once ucrest break out from weekly cup and handle....key will follow

Posted by Tigerchan > 2021-03-21 17:07 | Report Abuse

Better sell, big share holder is disposing. I sell of mine. Know how to cut loss, b4 pocket kosong

Posted by A Choo Pin > 2021-03-22 09:07 | Report Abuse

mari mari cepat mari ...

Posted by abcdead > 2021-03-22 09:13 | Report Abuse

cepat lu mau pegi mana

Posted by fengpinglangjin > 2021-03-22 09:49 | Report Abuse

ucrest is the train head banker is pushing...keyasic is the train body...coming soon

Posted by fengpinglangjin > 2021-03-22 09:52 | Report Abuse

keyasic is on multi year up trend reversal...hold the ticket for long term...this is going 50sen in the coming qtrs.

Posted by fengpinglangjin > 2021-03-22 11:39 | Report Abuse

u crest and keyasic will be 50 sen nex few qtrs when they rollout their plans medical iot within this year gradually.

Medical IOT is the future trend. The leader in Medical IOT is ucrest and keyasic. No other choice.

Posted by fengpinglangjin > 2021-03-22 17:42 | Report Abuse

Keyasic and UCrest got a lot of major contract coming for AI ,Telemdeicine and Imedic

https://www.facebook.com/xifuinv/videos/256917449459024/ .

Posted by Manin40 > 2021-03-23 15:23 | Report Abuse

got technology but revenue flat

Posted by RedEagle > 2021-03-23 18:45 | Report Abuse

thank you all

Posted by ainisukori > 2021-03-24 09:57 | Report Abuse

collecting ticket patiently...

Posted by fl888 > 2021-03-24 14:46 | Report Abuse

Too many PPs enlarging share capital base...be careful if once consolidate 10 to 1....sure go down...

Posted by abcdead > 2021-03-28 13:14 | Report Abuse

tumolo plise go up to moon

Posted by razifffff82 > 2021-03-29 16:25 | Report Abuse

Nice joke abcdead..

Posted by tai yee > 2021-03-29 16:27 | Report Abuse

no eye see

Posted by mariam > 2021-03-29 16:59 | Report Abuse

what is SoC ?

Posted by wong > 2021-03-29 17:37 | Report Abuse

A system on a chip (SoC) is an integrated circuit (also known as a "chip") that integrates all or most components of a computer or other electronic system. These components almost always include a central processing unit (CPU), memory, input/output ports and secondary storage, often alongside other components such as radio modems and a graphics processing unit (GPU) – all on a single substrate or microchip.It may contain digital, analog, mixed-signal, and often radio frequency signal processing functions (otherwise it is considered only an application processor).

Posted by wong > 2021-03-29 17:37 | Report Abuse

Higher-performance SoCs are often paired with dedicated and physically separate memory and secondary storage (almost always LPDDR and eUFS or eMMC, respectively) chips, that may be layered on top of the SoC in what's known as a package on package (PoP) configuration, or be placed close to the SoC. Additionally, SoCs may use separate wireless modems.

Posted by wong > 2021-03-29 17:37 | Report Abuse

SoCs are in contrast to the common traditional motherboard-based PC architecture, which separates components based on function and connects them through a central interfacing circuit board. Whereas a motherboard houses and connects detachable or replaceable components, SoCs integrate all of these components into a single integrated circuit. An SoC will typically integrate a CPU, graphics and memory interfaces, hard-disk and USB connectivity,random-access and read-only memories and secondary storage and/or their controllers on a single circuit die, whereas a motherboard would connect these modules as discrete components or expansion cards.

Posted by wong > 2021-03-29 17:37 | Report Abuse

An SoC integrates a microcontroller, microprocessor or perhaps several processor cores with peripherals like a GPU, Wi-Fi and cellular network radio modems, and/or one or more coprocessors. Similar to how a microcontroller integrates a microprocessor with peripheral circuits and memory, an SoC can be seen as integrating a microcontroller with even more advanced peripherals. For an overview of integrating system components, see system integration.

Posted by wong > 2021-03-29 17:38 | Report Abuse

More tightly integrated computer system designs improve performance and reduce power consumption as well as semiconductor die area than multi-chip designs with equivalent functionality. This comes at the cost of reduced replaceability of components. By definition, SoC designs are fully or nearly fully integrated across different component modules. For these reasons, there has been a general trend towards tighter integration of components in the computer hardware industry, in part due to the influence of SoCs and lessons learned from the mobile and embedded computing markets. SoCs can be viewed as part of a larger trend towards embedded computing and hardware acceleration.SoCs are very common in the mobile computing (such as in smartphones and tablet computers) and edge computing markets. They are also commonly used in embedded systems such as WiFi routers and the Internet of Things.

Posted by wong > 2021-03-29 17:39 | Report Abuse

SoCs can be applied to any computing task. However, they are typically used in mobile computing such as tablets, smartphones, smartwatches and netbooks as well as embedded systems and in applications where previously microcontrollers would be used.

Posted by wong > 2021-03-29 17:40 | Report Abuse

Embedded systems Where previously only microcontrollers could be used, SoCs are rising to prominence in the embedded systems market. Tighter system integration offers better reliability and mean time between failure, and SoCs offer more advanced functionality and computing power than microcontrollers. Applications include AI acceleration, embedded machine vision, data collection, telemetry, vector processing and ambient intelligence. Often embedded SoCs target the internet of things, industrial internet of things and edge computing markets.

Posted by razifffff82 > 2021-03-29 17:41 | Report Abuse

First we have got soonheng...now come another one..wong

Posted by wong > 2021-03-29 17:41 | Report Abuse

SoCs are being applied to mainstream personal computers .They are particularly applied to laptops and tablet PCs. Tablet and laptop manufacturers have learned lessons from embedded systems and smartphone markets about reduced power consumption, better performance and reliability from tighter integration of hardware and firmware modules, and LTE and 5G wireless network communications integrated on chip (integrated network interface controllers)

Posted by wong > 2021-03-29 17:42 | Report Abuse

An SoC consists of hardware functional units, including microprocessors that run software code, as well as a communications subsystem to connect, control, direct and interface between these functional modules.

Posted by wong > 2021-03-29 17:43 | Report Abuse

Processor cores An SoC must have at least one processor core, but typically an SoC has more than one core. Processor cores can be a microcontroller, microprocessor (μP), digital signal processor (DSP) or application-specific instruction set processor (ASIP) core.[ASIPs have instruction sets that are customized for an application domain and designed to be more efficient than general-purpose instructions for a specific type of workload. Multiprocessor SoCs have more than one processor core by definition. Whether single-core, multi-core or many core, SoC processor cores typically use RISC instruction set architectures. RISC architectures are advantageous over CISC processors for SoCs because they require less digital logic, and therefore less power and area on board, and in the embedded and mobile computing markets, area and power are often highly constrained. In particular, SoC processor cores often use the ARM architecture because it is a soft processor specified as an IP core and is more power efficient than x86.

Posted by wong > 2021-03-29 17:46 | Report Abuse

memory SoCs must have semiconductor memory blocks to perform their computation, as do microcontrollers and other embedded systems. Depending on the application, SoC memory may form a memory hierarchy and cache hierarchy. In the mobile computing market, this is common, but in many low-power embedded microcontrollers, this is not necessary. Memory technologies for SoCs include read-only memory (ROM), random-access memory (RAM), Electrically Erasable Programmable ROM (EEPROM) and flash memory. As in other computer systems, RAM can be subdivided into relatively faster but more expensive static RAM (SRAM) and the slower but cheaper dynamic RAM (DRAM). When an SoC has a cache hierarchy, SRAM will usually be used to implement processor registers and cores' L1 caches whereas DRAM will be used for lower levels of the cache hierarchy including main memory. "Main memory" may be specific to a single processor (which can be multi-core) when the SoC has multiple processors, in which case it is distributed memory and must be sent via Intermodule communication on-chip to be accessed by a different processo

Posted by wong > 2021-03-29 17:46 | Report Abuse

Interfaces SoCs include external interfaces, typically for communication protocols. These are often based upon industry standards such as USB, FireWire, Ethernet, USART, SPI, HDMI, I²C, etc. These interfaces will differ according to the intended application. Wireless networking protocols such as Wi-Fi, Bluetooth, 6LoWPAN and near-field communication may also be supported.
When needed, SoCs include analog interfaces including analog-to-digital and digital-to-analog converters, often for signal processing. These may be able to interface with different types of sensors or actuators, including smart transducers. They may interface with application-specific modules or shields. Or they may be internal to the SoC, such as if an analog sensor is built in to the SoC and its readings must be converted to digital signals for mathematical processing.

Posted by wong > 2021-03-29 17:48 | Report Abuse

Digital signal processor (DSP) cores are often included on SoCs. They perform signal processing operations in SoCs for sensors, actuators, data collection, data analysis and multimedia processing. DSP cores typically feature very long instruction word (VLIW) and single instruction, multiple data (SIMD) instruction set architectures, and are therefore highly amenable to exploiting instruction-level parallelism through parallel processing and superscalar execution. DSP cores most often feature application-specific instructions, and as such are typically application-specific instruction-set processors (ASIP). Such application-specific instructions correspond to dedicated hardware functional units that compute those instructions. Typical DSP instructions include multiply-accumulate, Fast Fourier transform, fused multiply-add, and convolutions.

Posted by wong > 2021-03-29 17:48 | Report Abuse

As with other computer systems, SoCs require timing sources to generate clock signals, control execution of SoC functions and provide time context to signal processing applications of the SoC, if needed. Popular time sources are crystal oscillators and phase-locked loops.SoC peripherals including counter-timers, real-time timers and power-on reset generators. SoCs also include voltage regulators and power management circuits.

Posted by wong > 2021-03-29 17:49 | Report Abuse

Intermodule communication SoCs comprise many execution units. These units must often send data and instructions back and forth. Because of this, all but the most trivial SoCs require communications subsystems. Originally, as with other microcomputer technologies, data bus architectures were used, but recently designs based on sparse intercommunication networks known as networks-on-chip (NoC) have risen to prominence and are forecast to overtake bus architectures for SoC design in the near future

Posted by wong > 2021-03-29 17:51 | Report Abuse

Bus-based communication .Historically, a shared global computer bus typically connected the different components, also called "blocks" of the SoC.] A very common bus for SoC communications is ARM's royalty-free Advanced Microcontroller Bus Architecture (AMBA) standard. Direct memory access controllers route data directly between external interfaces and SoC memory, bypassing the CPU or control unit, thereby increasing the data throughput of the SoC. This is similar to some device drivers of peripherals on component-based multi-chip module PC architectures. Computer buses are limited in scalability, supporting only up to tens of cores (multicore) on a single chip. Wire delay is not scalable due to continued miniaturization, system performance does not scale with the number of cores attached, the SoC's operating frequency must decrease with each additional core attached for power to be sustainable, and long wires consume large amounts of electrical power. These challenges are prohibitive to supporting many core systems on chip.

Posted by emomomo > 2021-03-29 17:51 | Report Abuse

ooh ... Wong incredible ... seems like a tutorial class ... what does 10 SOC to layman like us ?

Posted by wong > 2021-03-29 17:52 | Report Abuse

Network on a chip a trend of SoCs implementing communications subsystems in terms of a network-like topology instead of bus-based protocols has emerged. A trend towards more processor cores on SoCs has caused on-chip communication efficiency to become one of the key factors in determining the overall system performance and cost. This has led to the emergence of interconnection networks with router-based packet switching known as "networks on chip" (NoCs) to overcome the bottlenecks of bus-based networks.
Networks-on-chip have advantages including destination- and application-specific routing, greater power efficiency and reduced possibility of bus contention. Network-on-chip architectures take inspiration from networking protocols like TCP and the Internet protocol suite for on-chip communication, although they typically have fewer network layers. Optimal network-on-chip network architectures are an ongoing area of much research interest. NoC architectures range from traditional distributed computing network topologies such as torus, hypercube, meshes and tree networks to genetic algorithm scheduling to randomized algorithms such as random walks with branching and randomized time to live (TTL).
Many SoC researchers consider NoC architectures to be the future of SoC design because they have been shown to efficiently meet power and throughput needs of SoC designs. Current NoC architectures are two-dimensional. 2D IC design has limited floorplanning choices as the number of cores in SoCs increase, so as three-dimensional integrated circuits (3DICs) emerge, SoC designers are looking towards building three-dimensional on-chip networks known as 3DNoCs

Posted by wong > 2021-03-29 17:59 | Report Abuse

SoC chips are typically fabricated using metal–oxide–semiconductor (MOS) technology. The netlists described above are used as the basis for the physical design (place and route) flow to convert the designers' intent into the design of the SoC. Throughout this conversion process, the design is analyzed with static timing modeling, simulation and other tools to ensure that it meets the specified operational parameters such as frequency, power consumption and dissipation, functional integrity (as described in the register transfer level code) and electrical integrity.
When all known bugs have been rectified and these have been re-verified and all physical design checks are done, the physical design files describing each layer of the chip are sent to the foundry's mask shop where a full set of glass lithographic masks will be etched. These are sent to a wafer fabrication plant to create the SoC dice before packaging and testing.

Posted by wong > 2021-03-29 18:00 | Report Abuse

SoCs can be fabricated by several technologies, including:
Full custom ASIC
Standard cell ASIC
Field-programmable gate array (FPGA)
ASICs consume less power and are faster than FPGAs but cannot be reprogrammed and are expensive to manufacture. FPGA designs are more suitable for lower volume designs, but after enough units of production ASICs reduce the total cost of ownership.

Posted by wong > 2021-03-29 18:01 | Report Abuse

SoC designs consume less power and have a lower cost and higher reliability than the multi-chip systems that they replace. With fewer packages in the system, assembly costs are reduced as well.However, like most very-large-scale integration (VLSI) designs, the total cost[clarification needed] is higher for one large chip than for the same functionality distributed over several smaller chips, because of lower yields[clarification needed] and higher non-recurring engineering costs.
When it is not feasible to construct an SoC for a particular application, an alternative is a system in package (SiP) comprising a number of chips in a single package. When produced in large volumes, SoC is more cost-effective than SiP because its packaging is simpler. Another reason SiP may be preferred is waste heat may be too high in a SoC for a given purpose because functional components are too close together, and in an SiP heat will dissipate better from different functional modules since they are physically further apart.

Posted by razifffff82 > 2021-03-29 18:26 | Report Abuse

Wong...are you a human?

Posted by Shahexedy > 2021-03-29 22:15 | Report Abuse

Wong another program created by keyasic.now songheng got assistant already.haha